AI-Assisted Verification: Why Sign-Off Still Depends on Engineering Intent

Mike Bartley, CEO of Alpinum Consulting, continues his Silicon Systems Design column in the July/August 2026 edition of Electronics World with:

“Assisted verification: Sign-off still depends on engineering intent”

AI is becoming increasingly useful within semiconductor verification. Engineers are exploring AI assistance for test generation, assertion drafting, regression triage, debug support, log summarisation, coverage analysis and engineering knowledge retrieval.

But an important distinction remains:

AI can accelerate verification activity. It does not assume responsibility for engineering sign-off.

The question is therefore no longer simply whether AI can perform useful verification tasks. Engineering teams must determine whether those activities remain connected to requirements, verification intent and the evidence needed to demonstrate that a design is ready for sign-off.

That is the focus of Mike’s latest Electronics World column.

Read the full July/August Electronics World column

This article continues the discussion from Mike’s previous Electronics World column on moving AI in design verification from experimentation to measurable capability. The July/August column moves the discussion towards a different engineering question: how verification intent and evidence must remain in control when AI assists verification execution.

Verification activity is not verification confidence

One of the risks of AI-assisted verification is confusing increased activity with increased confidence. An AI system may generate additional tests, suggest assertions, classify regression failures or summarise large quantities of verification output. Each of these activities can save engineering time. But volume is not evidence by itself. More tests do not necessarily exercise the behaviours that matter most. More coverage data does not necessarily demonstrate that critical scenarios have been verified. More debug summaries do not necessarily improve understanding of the underlying root cause.

The purpose of verification is to establish whether the design satisfies its intended behaviour under the conditions that matter. That distinction becomes increasingly important as AI enters verification workflows. A useful AI system should therefore help engineers reach relevant evidence more efficiently rather than simply generate more verification artefacts.

Alpinum’s Design Verification Services address this broader engineering challenge across verification strategy, planning, implementation, debug and closure.

What is verification intent?

Verification intent is the engineering definition of:

what must be checked, why it matters, where it applies and what evidence is required for confidence.

This definition should originate from requirements, architecture and engineering risk rather than from a particular verification tool.

At block level, verification intent may include:

• Register behaviour
• Reset sequencing
• Protocol rules
• Interrupt handling
• Error responses
• Corner-case operation

At subsystem level, the intent may extend to arbitration, ordering, coherency, quality of service, power-management dependencies and security boundaries. At system level, it may include software-visible behaviour, integration assumptions, performance expectations and recovery paths.

The resulting verification chain should remain clear:

Requirement → verification intent → verification implementation → evidence → engineering sign-off

AI can assist individual stages within this chain, but the engineering intent should remain the controlling layer. This is also why disciplined verification planning and coverage closure are important. Tests, assertions and coverage become substantially more useful when engineers can relate them to explicit verification objectives.

Verification intent should be reusable

Verification intent becomes particularly valuable when it can survive changes in verification engine. Modern semiconductor programmes rarely rely on a single execution environment. Evidence may come from simulation, formal verification, emulation, FPGA prototyping and eventually post-silicon validation.

The underlying engineering objective should remain recognisable across these environments. Portable tests and stimulus can help represent scenarios in forms that can be reused across platforms. Assertions, coverage models and verification objectives provide further mechanisms for preserving intent.

This matters because the same architectural behaviour may need to be examined using different verification technologies. Structured methodologies such as UVM provide repeatable mechanisms for stimulus generation, checking, coverage, and reuse. Formal techniques provide a complementary way to establish evidence for properties and corner cases that may be difficult to exhaustively exercise through simulation.

The objective is not to force every verification engine into an identical implementation. It is to preserve the connection between what engineers intended to verify and the evidence produced by each environment.

Where AI can assist without owning the intent

AI can provide useful support within an intent-driven verification process.

For example, it may:

• Draft an assertion from a protocol rule
• Suggest coverage bins from a scenario description
• Identify recurring regression failure patterns
• Summarise large logs
• Highlight potential coverage gaps
• Retrieve relevant verification knowledge
• Help engineers navigate large quantities of evidence

These tasks can reduce repetitive engineering effort. However, generated output still requires context. Consider an AI-generated assertion. The syntax may be valid and the property may even pass simulation or formal analysis. That does not demonstrate that the assertion represents the original requirement correctly.

An engineer still needs to ask:

Does this property check the behaviour we actually intended to verify?

The same applies to tests and coverage. AI can suggest a test, but engineers must understand which requirement or risk it addresses. AI can identify a coverage gap, but engineers must determine whether that gap represents an important missing scenario or an irrelevant state. The distinction between assistance and engineering responsibility is fundamental.

For teams evaluating where these techniques can be introduced safely, Alpinum’s AI in Design Verification services focus on applying AI within existing verification engineering processes rather than treating AI as a replacement for them.

Traceability becomes more important with AI

AI-assisted verification increases the importance of traceability. If an AI-generated test, assertion, property or summary contributes towards verification closure, engineers should be able to understand its relationship to the original engineering objective.

Useful questions include:

• Which requirement does this artefact address?
• Which verification objective does it support?
• What assumptions were made?
• Which scenario or risk is being exercised?
• What evidence demonstrates success?
• Has the generated content been reviewed?
• Can the result be reproduced?

Without those connections, apparently useful AI output can become difficult to incorporate into a defensible sign-off argument. Consider an AI-generated property that passes every regression. That sounds positive. But if the property checks the wrong interpretation of a requirement, its pass status contributes little confidence.

Similarly, an AI-generated test may increase code or functional coverage while missing the scenario engineers actually needed to exercise. Traceability therefore provides the connection between verification activity and verification meaning.

From verification metrics to sign-off evidence

Verification teams use many metrics to understand progress. These may include functional coverage, code coverage, assertion results, regression status, bug trends and scenario completion. They are valuable indicators. But sign-off is not a single metric.

A design can show high coverage while still missing an important architectural scenario. An assertion can pass while representing an incomplete interpretation of a requirement. A regression can complete successfully while failing to exercise a critical corner case.

The engineering question is therefore not simply:

“Did the metric pass?”

It is:

“Does the available evidence demonstrate that the intended behaviour has been verified with sufficient confidence?”

Sign-off evidence may include:

• Passing regressions
• Functional and code coverage
• Assertion results
• Formal verification results
• Bug and defect trends
• Scenario completion
• Waiver reviews
• Emulation results
• Other programme-specific evidence

AI can help engineers navigate these data sources. It can identify patterns, summarise results and direct attention towards anomalies. Those capabilities become increasingly useful as verification programmes generate larger quantities of information. But interpretation remains an engineering task.

Where AI-assisted verification introduces risk

One particular challenge with generative AI is that technically incorrect output can still appear convincing. A generated assertion, coverage recommendation or debug explanation may use familiar terminology and plausible reasoning while overlooking an important dependency or assumption. That creates several potential verification risks.

AI-generated content may be:

• Syntactically correct but semantically wrong
• Based on incomplete context
• Inconsistent with previous assumptions
• Disconnected from the verification plan
• Duplicated elsewhere in the environment
• Difficult to trace back to a requirement

This is why AI-generated verification artefacts should be treated as engineering inputs requiring review rather than automatically accepted evidence. The issue is particularly important for sign-off because engineers need to understand not only what passed, but also why that result contributes confidence.

Applying risk-management thinking to AI-assisted verification

AI does not need an entirely separate engineering discipline. Many established risk-management principles already provide a useful framework. Teams can consider three questions.

Map

• Where is AI being used in the verification process?
• What decisions or engineering outputs can it influence?
• What data and context does it depend upon?

Measure

• What risks can arise from the AI-assisted activity?
• How are those risks assessed, analysed and tracked?
• What evidence demonstrates that the AI-assisted output remains useful?

Manage

• Which risks require controls?
• Where is human review mandatory?
• How will the organisation respond if AI output is incomplete, inconsistent or incorrect?

The objective is not to eliminate every AI-related risk. It is to make those risks visible and manageable within the engineering process.

Human review remains central

AI changes the work engineers perform, but it does not remove engineering accountability. Verification engineers may spend less time on repetitive drafting, searching and summarising and more time reviewing intent, challenging assumptions and interpreting evidence. That makes review discipline increasingly important. AI-generated assertions should be checked for semantic correctness.

Debug summaries should be validated against logs and waveforms. Coverage recommendations should be related back to the verification plan. Generated tests should be linked to verification objectives. Waiver recommendations should receive particular scrutiny because they can directly affect closure decisions.

The principle is straightforward:

AI can assist verification, but it must not weaken the verification argument.

Human review provides the engineering judgement needed to determine whether AI-assisted output contributes meaningful evidence.

Engineering intent remains the basis of sign-off

AI will continue to influence semiconductor design verification. It can help engineers work faster, reduce repetitive tasks and navigate increasingly complex verification environments. But the fundamental purpose of verification does not change. Before sign-off, teams still need to answer:

• What are we trying to prove?
• Why does it matter?
• What evidence demonstrates that we have verified it?
• What assumptions remain?
• What risk remains?

AI can support engineers in answering those questions. It cannot take responsibility for them. As AI-assisted verification becomes more capable, verification intent provides the structure that keeps requirements, verification activity, evidence and engineering judgement connected. That makes intent more important, not less, in an AI-assisted verification environment.

Continue the Electronics World discussion

This July/August column develops the argument from Mike Bartley’s previous Electronics World article on measurable AI verification capability, moving from organisational capability towards verification intent, evidence and sign-off responsibility.

For teams examining where AI can support existing engineering workflows, explore Alpinum’s AI in Design Verification services. For programmes requiring support with verification strategy, planning, implementation, coverage closure or sign-off, explore Alpinum’s Design Verification Services.

Discuss your verification challenges with Alpinum.