Mike Bartley, CEO of Alpinum Consulting, continues his Silicon Systems Design column in the October 2026 edition of Electronics World with:
“Building trustworthy AI workflows for semiconductor engineering”
AI in semiconductor verification is moving beyond isolated assistance. Verification agents can increasingly interpret an objective, plan a sequence of actions, invoke engineering tools and use the resulting data to decide what should happen next.
That creates a harder engineering question:
How do we know that an AI agent’s work is good enough to influence a verification decision?
Mike’s October column examines that assurance problem. The central argument is that an AI system reviewing its own output is not, by itself, independent verification. Trust has to come from controlled engineering context, external checks, reproducible tool results, traceability and explicit engineering acceptance.
👉 Read the full published Electronics World column: Free Access – Electronics World October 2026 Column
Why trustworthy AI workflows matter in semiconductor verification
The move from copilots to agents changes the role AI can play inside a verification environment. A copilot may help an engineer draft an assertion or summarise a log. An agent can potentially choose the next activity, invoke simulation or formal analysis, inspect the result and continue the workflow.
That additional autonomy makes evidence more important, not less.
A simulator can report that a test passed. A formal engine can prove a property under defined assumptions. A regression system can expose a failure. However, none of these results is sufficient if the wrong requirement was selected, the context is outdated or the acceptance criterion does not represent the intended design behaviour.
The October column therefore focuses on the link between AI activity and engineering evidence. The useful question is not simply whether an agent completed a task, but whether the result can be traced to the right requirement, independently checked and reproduced by an engineer.
From AI agents to defensible engineering evidence
Three practical questions sit behind the discussion:
- Was the agent working from controlled, current engineering context?
- Was its conclusion checked by an external engineering mechanism rather than only by the model itself?
- Can an engineer trace the result back to the requirement, tool execution, assumptions and acceptance decision?
This is particularly important when AI systems are given access to simulators, formal engines, regression infrastructure, coverage environments or design data. Tool access introduces authority as well as productivity. The workflow needs to define what the agent may read, what it may execute, what it may change and where human approval remains mandatory.
The article also considers the risk of circular verification. If the same AI system interprets a requirement, generates the verification artefact and then decides that its own evidence is sufficient, one misunderstanding can propagate through the entire loop. Independent checks and explicit acceptance criteria are therefore essential parts of a trustworthy workflow.
Where the October column fits in Mike’s Electronics World AI series
The October article is the latest step in a continuing Electronics World discussion on how AI should be introduced into design verification without weakening engineering control.
June 2026 – From Experimentation to Measurable Capability
The series first asked whether AI was creating measurable verification capability or simply more automated activity.
July/August 2026 – Why Sign-Off Still Depends on Engineering Intent
The next column moved from productivity to intent, arguing that AI-generated activity must remain linked to requirements, evidence and engineering sign-off.
September 2026 – Agentic AI Is Changing Design Verification
The discussion then moved from individual AI-assisted tasks to agents that can coordinate multi-step verification activity.
October 2026 – Building Trustworthy AI Workflows for Semiconductor Engineering
The latest column addresses the next question: once agents can act across a workflow, what evidence is needed before their conclusions can be trusted?
Together, the four columns form a progression from AI experimentation, to measurable capability, to controlled autonomy and finally to evidence-grounded engineering assurance.
Practical routes for teams exploring AI in DV
For engineering teams evaluating AI in design verification, the broader lesson is that capability should be introduced inside the existing verification discipline rather than around it. AI-assisted workflows need to coexist with requirements, UVM and formal methodologies, regression infrastructure, coverage closure, review processes and sign-off expectations.
Alpinum’s AI in Design Verification work focuses on this integration problem, including controlled adoption, verification workflow support and engineering governance.
The October column also references AlpinumDV as one practical example of combining AI-assisted verification activity with structured verification artefacts, controlled execution and reviewable evidence. Further information on the wider verification-tool roadmap is available through the Alpinum Tools hub.
Read the full Electronics World column
Mike’s full October 2026 Silicon Systems Design column is available free in Electronics World:
Read “Building trustworthy AI workflows for semiconductor engineering”
For the previous article in the series: Agentic AI Is Changing Design Verification
Explore Alpinum’s AI in Design Verification services | Explore AlpinumDV | View Alpinum Tools
The direction is increasingly clear: the value of AI in verification will not be determined by how autonomous an agent appears. It will be determined by whether its work can be checked, traced, reproduced and defended as engineering evidence.
Written by : Mike Bartley
Mike started in software testing in 1988 after completing a PhD in Math, moving to semiconductor Design Verification (DV) in 1994, verifying designs (on Silicon and FPGA) going into commercial and safety-related sectors such as mobile phones, automotive, comms, cloud/data servers, and Artificial Intelligence. Mike built and managed state-of-the-art DV teams inside several companies, specialising in CPU verification.
Mike founded and grew a DV services company to 450+ engineers globally, successfully delivering services and solutions to over 50+ clients.
Mike started Alpinum in April 2016 to deliver a range of start-of-the art industry solutions:
Alpinum AI provides tools and automations using Artificial Intelligence to help companies reduce development costs (by up to 90%!) Alpinum Services provides RTL to GDS VLSI services from nearshore and offshore centres in Vietnam, India, Egypt, Eastern Europe, Mexico and Costa Rica. Alpinum Consulting also provides strategic board level consultancy services, helping companies to grow. Alpinum training department provides self-paced, fully online training in System Verilog, UVM Introduction and Advanced, Formal Verification, DV methodologies for SV, UVM, VHDL and OSVVM and CPU/RISC-V. Alpinum Events organises a number of free-to-attend industry events
You can contact Mike (mike@alpinumconsulting.com or +44 7796 307958) or book a meeting with Mike using Calendly (https://calendly.com/mike-alpinum-consulting).
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