AI in design verification promotional image for Mike Bartley’s Electronics World column on moving from experimentation to measurable capability
Published On: 19th June 2026|Last Updated: 21st June 2026|By |
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Mike Bartley, CEO of Alpinum Consulting, has been published in the June 2026 edition of Electronics World with his latest Silicon Systems Design column, Design Verification – from experimentation to measurable capability. The article examines a critical question now facing semiconductor verification teams:

Does AI simply make isolated verification tasks faster, or does it measurably improve verification capability?

That distinction matters. Across the industry, verification teams are already exploring AI for regression analysis, debug assistance, log summarisation, coverage exploration, test prioritisation and knowledge retrieval. These are practical and valuable use cases. However, as Mike explains, local productivity gains do not automatically translate into stronger sign-off confidence.

A tool that generates more tests may increase activity, but that is not the same as verifying intent. A chatbot that retrieves methodology guidance may save time, but it does not remove the need for engineering judgement.

👉 Read the full published Electronics World column here:
Free Access Electronics World June Column

Why measurable capability matters

AI in design verification is no longer an abstract topic. Verification teams are already experimenting with AI-assisted workflows across regression triage, log analysis, debug support, test generation, coverage analysis and knowledge retrieval.

The harder question is whether those experiments improve the verification outcome.

For example, an AI assistant may reduce the time required to classify a regression failure. That is useful. But if the classification is not traceable, reviewed or integrated into the defect and coverage process, its system-level value is limited.

In verification, confidence is built through evidence. AI must therefore support the discipline of verification rather than sit outside it.

Relevant Alpinum service link:
AI in Design Verification Services

The common failure pattern

A key point in Mike’s article is the risk of tool-first adoption.

Many organisations begin their AI adoption by selecting a model, a tool demonstration, or a vendor feature, then searching for a problem to fit. This often creates disconnected pilots: one team uses AI for logs, another for test generation, another for knowledge retrieval and another for reporting. The result can be duplicated effort, inconsistent data handling, unclear ownership and weak evidence of improvement.

The bigger risk is not only that AI may give the wrong answer. The bigger engineering risk is that the organisation cannot explain how an AI-assisted conclusion was produced, reviewed, accepted or rejected. That is a serious limitation in verification because engineering sign-off is based on evidence, not convenience.

Relevant Alpinum service link:
AI in DV Adoption

Where AI helps verification teams

Mike highlights that the most practical near-term AI opportunities are areas where the task is bounded, repeatable and reviewable.

Examples include:

  • Regression failure clustering
  • Log summarisation
  • Duplicate issue identification
  • Debug assistance
  • Coverage gap analysis
  • Knowledge retrieval from methodology documents
  • Review support across repeated artefact checks
  • Test prioritisation and triage support

These applications are valuable because they can reduce repeated manual effort while keeping the engineering decision visible. The strongest AI use cases are not those that hide complexity. They are the ones that help engineers find patterns faster, focus attention on likely root causes and make better-informed decisions.

Relevant Alpinum service link:
Design Verification Services

Why governance matters

AI adoption in verification must be carefully governed because verification data is often distributed across specifications, RTL revisions, regression logs, coverage databases, methodology documents, debug environments, and sign-off flows.

If the data is fragmented, inconsistent or weakly governed, AI adoption becomes harder to scale. The column also makes clear that governance, security and IP protection are central maturity dimensions. AI must fit into the verification process, not bypass it.

For semiconductor teams, this means asking practical questions:

  • Is the AI-assisted output traceable?
  • Is the source data controlled?
  • Is the recommendation reviewable?
  • Can the result be reproduced?
  • Is the decision linked to verification intent?
  • Does it strengthen or weaken sign-off confidence?

These are the questions that separate AI experimentation from engineering capability.

From experimentation to adoption

The practical shift is from asking:

“Where can we use AI?”

to asking:

“Where does AI improve verification capability?”

That shift is important. Instead of selecting tools first, teams should assess verification maturity, data readiness, governance needs, workflow bottlenecks and measurable pilot opportunities.

A good AI in DV pilot should define:

  • The workflow is being improved
  • The baseline metric
  • The expected improvement
  • The data used
  • The review process
  • The scaling condition
  • The evidence needed for adoption

Without these elements, a pilot may demonstrate technical possibility but not adoption readiness. The next phase of AI in design verification will not be defined by who experiments first. It will be defined by who can measure, govern and scale AI inside real verification flows.

Continue the discussion

For engineering teams evaluating AI-assisted verification workflows, AI adoption readiness or structured verification capability improvement:

Book a discussion with Mike Bartley: Schedule a Meeting

Contact us: https://alpinumconsulting.com/contact-us/

 

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Written by : Mike Bartley

Mike started in software testing in 1988 after completing a PhD in Math, moving to semiconductor Design Verification (DV) in 1994, verifying designs (on Silicon and FPGA) going into commercial and safety-related sectors such as mobile phones, automotive, comms, cloud/data servers, and Artificial Intelligence. Mike built and managed state-of-the-art DV teams inside several companies, specialising in CPU verification.

Mike founded and grew a DV services company to 450+ engineers globally, successfully delivering services and solutions to over 50+ clients.

Mike started Alpinum in April 2016 to deliver a range of start-of-the art industry solutions:

Alpinum AI provides tools and automations using Artificial Intelligence to help companies reduce development costs (by up to 90%!) Alpinum Services provides RTL to GDS VLSI services from nearshore and offshore centres in Vietnam, India, Egypt, Eastern Europe, Mexico and Costa Rica. Alpinum Consulting also provides strategic board level consultancy services, helping companies to grow. Alpinum training department provides self-paced, fully online training in System Verilog, UVM Introduction and Advanced, Formal Verification, DV methodologies for SV, UVM, VHDL and OSVVM and CPU/RISC-V. Alpinum Events organises a number of free-to-attend industry events

You can contact Mike (mike@alpinumconsulting.com or +44 7796 307958) or book a meeting with Mike using Calendly (https://calendly.com/mike-alpinum-consulting).

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