AI in Design Verification | DV Club Edinburgh

Artificial Intelligence is rapidly transforming semiconductor design and verification workflows. From AI-assisted UVM development and intelligent debug to coverage analysis and formal verification, engineering teams are exploring how AI can improve productivity, accelerate project delivery, and manage increasing SoC complexity.

DV Club Edinburgh 2026 brought together leading semiconductor engineers, verification specialists, researchers, and technology companies to discuss the practical adoption of AI in Design Verification (AI in DV). Organisations evaluating AI adoption may also be interested in Alpinum’s AI in DV Adoption Framework.

The programme covered a broad range of topics, including AI-assisted verification methodologies, open-source UVM verification, security silicon verification, quality-aware formal verification, agentic AI for verification, floating-point unit (FPU) verification, coverage closure, debug automation, and emerging AI-enabled verification workflows.

Presentations from experts representing academia, EDA vendors, semiconductor companies, and verification consultancies provided practical insights into where AI is delivering measurable value today and where engineering judgement remains essential. Attendees also explored strategies for safely piloting AI in verification teams while maintaining quality, traceability, and confidence in verification sign-off.

This DV Club Edinburgh post-event page provides access to presentation materials, programme information, and future video recordings from the event. Organisations seeking to improve verification effectiveness may also find our resources on verification capability benchmarking and Design Verification training useful.