Courses Offered
Details of online/self-paced delivery format
Our Moodle-based self-paced learning platform offers interactive video lectures, notes, quizzes, and hands-on EDA tool exercises with instant automated feedback. Students benefit from guided support via bots, discussion forums, and optional weekly live tutorials. Progress is tracked continuously, leading to a final graded exam.
Details of the online/self-paced courses:
Upcoming Trainings
| Title | Date and Time | Registration link |
|---|---|---|
| [3 sessions] Ramping Up Formal Verification Training Series | Tue 3 Mar 2026 12:00 PM – 2:00 PM GMT | Registration Link |
| 3-Part RISC V Verification Course +++ | Starts Thur 16 April 2026 6:30 AM | Registration Link |
| 3-Part RISC-V Verification Course | Starts Thur 16 April 2026 8:30 AM | Registration Link |
| Advanced Communication Skills Training for Engineers | Mon 30 Mar 2026 12:00 PM – 2:00 PM GMT | Registration Link |
| [9 sessions] Complete Verification Training Bundle: SystemVerilog, UVM & SVA | Mon 23 Mar 2026 12:00 PM – 2:00 PM GMT | Registration Link |
| [3 sessions] SystemVerilog Assertions (SVA) | Mon 20 Apr 2026 12:00 PM – 2:00 PM BST | Registration Link |
| [3 sessions] Building Advanced UVM Test Benches | Tue 12 May 2026 12:00 PM – 2:00 PM BST | Registration Link |
| Formal Verification Training in Reading, UK | Mon 22 Jun 2026 9:30 AM – 4:30 PM BST | Registration link |
| GM/ID Analog Design with Python Training in Reading, UK | Mon 22 Jun 2026 9:30 AM – 4:30 PM BST | Registration link |
| RISC-V Verification Training in Reading, UK | Mon 22 Jun 2026 9:30 AM – 4:30 PM BST | Registration link |
| COCOTB-Based Open-Source Verification Training in Reading, UK | Mon 22 Jun 2026 1:00 PM – 5:00 PM BST | Registration link |
On-Demand Trainings
| Title | Description | Get Tickets |
|---|---|---|
| Formal Verification Training (6-Day Programme) | Our 6-Day Formal Verification Training Programme is now available as on-demand recordings, allowing engineers and teams to learn at their own pace while gaining practical knowledge that can be applied directly to real verification projects. | Get recordings |
| Open-Source Verification Training Series (3 sessions) | This three-part training series will equip you with the knowledge and practical skills needed to confidently integrate open-source tools into your verification workflow. Each session focuses on a key area—Python-based verification, open-source libraries, and shift-left testing—giving you a practical foundation you can apply immediately. | Get recordings |
| Ramping Up Formal Verification Training Series (3 sessions) | This three-part training series is designed to take participants from foundational formal concepts through to advanced verification techniques, with a strong focus on practical application using SystemVerilog Assertions (SVA). Across the series, you will progressively build the skills needed to write, debug, and prove assertions effectively, making formal verification a productive and scalable part of your verification flow. | Get recordings |
| [3 sessions] From Verilog to SystemVerilog for Advanced Verification | This three-part training series is designed for engineers transitioning from traditional Verilog into modern SystemVerilog-based verification. Across three structured sessions, you’ll move from core SystemVerilog concepts to advanced language features and real-world testbench development techniques. | Get recordings |

