September 2024:
FPGA Verification Strategies
| Time | Speaker | Details | Document | Recording |
|---|---|---|---|---|
| 9.30 | Arrival and registration | |||
| 10.00 | Dave Sanders, Rolls-Royce | Overview of Rolls Royce @ Solihull Rolls-Royce… the past, the present and the future |
View Pdf | View video |
| 10.30 | Espen Tallaksen, EmLogic | Modern VHDL testbenches – An AXI-stream example, first dead simple, then advanced | View Pdf | View video |
| 11.00 | Jim Lewis, SynthWorks Design Inc | Why Should Our Team be Using VHDL + OSVVM for Verification? | View Pdf | View video |
| 11.30 | Refreshment break | |||
| 12.00 | Philipp Wagner, FOSSi Foundation | cocotb is making verification fun! | View Pdf | View video |
| 12.30 | Christian Tchilikov, semify GmbH | Utilizing the Cocotb Python Framework for Efficient Functional Verification | View Pdf | View video |
| 13.00 | Dave Amor, Ultra Maritime | Integration of Atlassian Bamboo with MathWorks Tools for FPGA Development | View Pdf | View video |
| 13.30 | Lunch | |||
| 14.00 | Tour | |||
| 14.30 | Finish | Refreshments/networking |