September 2024:
FPGA Verification Strategies

TimeSpeakerDetailsDocumentRecordingBlog
9.30Arrival and registration
10.00Dave Sanders, Rolls-RoyceOverview of Rolls Royce @ Solihull
Rolls-Royce… the past, the present and the future
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10.30Espen Tallaksen, EmLogicModern VHDL testbenches – An AXI-stream example, first dead simple, then advancedView PdfView videoView Blog
11.00Jim Lewis, SynthWorks Design IncWhy Should Our Team be Using VHDL + OSVVM for Verification?View PdfView videoView Blog
11.30Refreshment break
12.00Philipp Wagner, FOSSi Foundationcocotb is making verification fun!View PdfView videoView Blog
12.30Christian Tchilikov, semify GmbHUtilizing the Cocotb Python Framework for Efficient Functional VerificationView PdfView videoView Blog
13.00Dave Amor, Ultra MaritimeIntegration of Atlassian Bamboo with MathWorks Tools for FPGA DevelopmentView PdfView videoView Blog
13.30Lunch
14.00Tour
14.30FinishRefreshments/networking