- Sharing technical expertise and knowledge amongst professionals on how to leverage the power of AI in DV, while helping build the verification community through regular educational and networking events.
- In collaboration with Tessolve
- The FPGA Front Runner bringing together FPGA design and verification communities to discuss all things gate array. Share knowledge, find out what is going on and network with like minded people.
In collaboration with TechWorks
- This one day Verification Futures conferences provide the opportunity for verification engineers to outline their main challenges and for the EDA vendors to respond with possible solutions. It also provides an excellent opportunity to network and catch up with other verification engineers.
In collaboration with Tessolve