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Welcome to the May 2025 edition of the monthly Alpinum newsletter focused on keeping you up to date with the world of Design Verification and AI as well as the latest news on our events and services.

Industry News & Events: Design Verification & AI

AI Drives Re-Engineering of Nearly Everything In Chips


Semiconductor Engineering

How Hardware-Assisted Verification is Turbocharging Artificial Intelligence


Synopsys Blog

How FPGA-Based Prototyping Can De-Risk Development


Techworks Event

Resilient IoT + Trustable AI: Two Leading Edge Conferences in One Place


IoTSF & Techwork Conference

Can AI Enable Self-Sustaining Autonomous Robots?


EE Times Article

Why is Analog Creating Ripples in Digital Verification?


Semiconductor Engineering

Edge AI Markets Surge Based on Speed and Security


Design News

Achieving ML-Driven Full-Flow Chip Design Automation


Cadence Blog

Microelectronics UK

September 24-25, 2025

Microelectronics UK

Mike Barley, CEO of Alpinum Consulting, will chair the panel discussion on ‘Semiconductor Innovations for Autonomous Connected Vehicles’. Rupert Baines will chair the discussion ‘How EDA Tools are Evolving to Improve Security’.


View Program & Pre-Register

Alpinum Events

Alpinum Consulting are delighted to be involved in organising, or contributing to the following industry events.

DVClub World

Chiplet Image

DVClub World* – Next Meeting

June 25, 2025. Online

Verifying Chiplet-based Systems

This DVClub meeting will focus on the challenges, strategies, and breakthroughs in verifying chiplet-based systems. Industry leaders and verification experts will share real-world case studies, emerging methodologies, and practical insights.


Register Today

DVClub World* – Call for Talks

July 15, 2025

Successful RISC-V Verification

The call for submissions is now open for this meeting.

Contact: Mike Bartley

DVClub World* – Archive

April, 09 2025

Using AI/ML in Design Verification


Presentations Now Available

DVClub Israel* – Call for Talks

October 27, 2025. Tel Aviv & Online

Case Studies for the Use of AI in Verification

The call for submissions is now open for this meeting.

Contact: Mike Bartley

Verification Futures 2025

Alpinum Conference*

Verification Futures 2025 | July 01, Reading, UK and Online.

The one-day Verification Futures conference is now in its 13th successful year. VF2025 provides the opportunity for verification engineers to outline their main challenges and for the EDA vendors to respond with possible solutions. It also provides an excellent opportunity to network and catch up with other verification engineers.


View Program & Register

AI in DV Webinar Series

Empowering Design and Verification with AI

Check out the recording from our recent webinar series to discover the power of AI to revolutionise the DV process.


View Presentations

Alpinum Blogs and Services

Alpinum Blog Post

Unlocking the Untapped Potential of Machine Learning on FPGAs with DevOps

With advancements in computational power and access to high-quality data, adopting machine learning has become more accessible and cost-effective, making it a strategic asset for fostering growth, innovation, and competitive advantage in today’s digital landscape.


Read blog

Alpinum Services

AI Automation Services

Alpinum has a proven track record of driving AI adoption and roll out strategies that have delivered enormous benefits through a blend of automation and AI.


Learn more

Alpinum Services

Training Courses

Discover our full range of online, self-paced Design and Verification training courses.

  • Universal Verification Methodology (UVM) Introduction Training
  • Advanced Universal Verification Methodology (UVM) Training
  • System Verilog Training
  • Formal Verification Training
  • Design Verification for SV/UVM Training
  • Design Verification for VHDL/OSVVM Training
  • RISC-V Verification Training


View all courses

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Training Newsletter

Alpinum Services

Consulting Services

Alpinum Consulting delivers strategic advice on adopting AI and best-practice Design Verification (DV) methodologies – streamlining business processes to improve quality, whilst reducing both schedule and costs, often by as much as 90%.


Learn More

Alpinum Services

Career Opportunities

At Alpinium Consulting, we are passionate about investing in and nurturing our people to help them reach their goals. If you’re ready to experience our work culture and the career you have always looked for, we would love to hear from you.


See all career opportunities

Alpinum Partners

Welcome to the Alpinum Partner Network, a network of like-minded organisations with which we collaborate to deliver innovative, cost-effective DV and AI solutions and outreach.

Eteros provide high-quality end-to-end semiconductor engineering services and offers expertise in Automotive, AI, and Datacenter SoCs.

Visit website

Author

  • Mike Bartley

    Mike started in software testing in 1988 after completing a PhD in Math, moving to semiconductor Design Verification (DV) in 1994, verifying designs (on Silicon and FPGA) going into commercial and safety-related sectors such as mobile phones, automotive, comms, cloud/data servers, and Artificial Intelligence. Mike built and managed state-of-the-art DV teams inside several companies, specialising in CPU verification. Mike founded and grew a DV services company to 450+ engineers globally, successfully delivering services and solutions to over 50+ clients . The company was acquired by Tessolve Semiconductors in 2020 and Mike worked at Tessolve as SVP. Mike started Alpinum in April 2025 to deliver a range of start-of-the art industry solutions:

    Alpinum AI provides tools and automations using Artificial Intelligence to help companies reduce development costs (by up to 90%!)

    Alpinum Services provides RTL to GDS VLSI services from nearshore and offshore centres in Vietnam, India, Egypt, Eastern Europe, Mexico and Costa Rica.

    Alpinum Consulting also provides strategic board level consultancy services, helping companies to grow.

    Alpinum training department provides self-paced, fully online training in System Verilog, UVM Introduction and Advanced, Formal Verification, DV methodologies for SV, UVM, VHDL and OSVVM and CPU/RISC-V.

    Alpinum Events organises a number of free-to-attend industry events

    You can contact Mike (mike@alpinumconsulting.com or +44 7796 307958) or book a meeting with Mike using Calendly (https://calendly.com/mike-alpinumconsulting).